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PIC18F2221/2321/4221/4321 FAMILY

DS39689F-page 54

2009 Microchip Technology Inc.

5.6

Reset State of Registers

Most registers are unaffected by a Reset. Their status

is unknown on POR and unchanged by all other

Resets. The other registers are forced to a “Reset

state” depending on the type of Reset that occurred.

Most registers are not affected by a WDT wake-up,

since this is viewed as the resumption of normal oper-

ation. Status bits from the RCON register, RI, TO, PD,

POR and BOR, are set or cleared differently in different

Reset situations, as indicated in Table 5-3. These bits

are used in software to determine the nature of the

Reset.

Table 5-4 describes the Reset states for all of the

Special Function Registers. These are categorized by

Power-on and Brown-out Resets, Master Clear and

WDT Resets and WDT wake-ups.

TABLE 5-3:

STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION

FOR RCON REGISTER

Condition

Program

Counter

RCON Register

STKPTR Register

POR BOR STKFUL

STKUNF

Power-on Reset

0000h

100

RESET Instruction

0000h

uuu

Brown-out

0000h

1u0

MCLR during power-managed Run modes

0000h

uuu

MCLR during power-managed Idle modes

and Sleep mode

0000h

0uu

WDT Time-out during full power or

power-managed Run mode

0000h

uuu

MCLR during full power execution

0000h

uuu

Stack Full Reset (STVREN = 1)

0000h

uuu

Stack Underflow Reset (STVREN = 1)

0000h

uuu

Stack Underflow Error (not an actual Reset,

STVREN = 0)

0000h

uuu

WDT time-out during power-managed Idle or

Sleep modes

PC + 2

0uu

Interrupt exit from power-managed modes

PC + 2(1)

0uu

Legend: u = unchanged

Note 1:

When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the

interrupt vector (008h or 0018h).

Reset state is ‘1’ for POR and unchanged for all other Resets when software BOR is enabled

(BOREN<1:0> Configuration bits = 01 and SBOREN = 1); otherwise, the Reset state is ‘0’.

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